1. Field of the Invention
The present invention relates to a system and method for load balancing in a multicore system environment, and more particularly, to a system and method of allowing a master core to dynamically load, delete, or execute a driver of a module device on specific slave cores in the multicore system environment.
This work was supported by the IT/R&D program of the MIC/IITA [2006-S-038-02: Development of Device-Adaptive Embedded Operating System for Mobile Convergence Computing]
2. Description of the Related Art
Recently, load balancing technologies have been actively researched. In the load balancing technologies, operating systems (OSs) are executed on multiple core central processing units (CPUs), and jobs are suitably distributed over the multiple core CPUs in a multicore system environment for sharing information through a shared memory, so that performance and utilization of the multiple cores can be improved.
The load balancing technologies are classified into three multi-processing schemes of an asymmetric multi-processing (AMP) scheme, a symmetric multi-processing (SMP) scheme, and a bounding multi-processing (BMP) scheme. The AMP scheme is also classified into a homogenous AMP scheme, and a heterogeneous AMP scheme. In the homogenous AMP scheme, the same-type OSs are loaded on different multicore CPUs, but the OSs are independently executed. In the heterogeneous AMP scheme, different-type OSs are loaded and executed on different multicore CPUs.
In SMP scheme, a single OS is loaded on a main core, and the main core manages the other cores simultaneously. Application programs are allowed to be executed on any one of the cores. That is, in the SMP scheme, a single OS scheduler manages jobs of all the cores.
In the BMP scheme, similarly to the SMP, a single OS manages all the cores simultaneously. However, cores of performing a system initialization and specific application programs are fixed in advance.
The BMP scheme is provided so as to solve a problem of the SMP scheme in that the SMP scheme cannot improve performance by employing an application program produced in a single system environment as an application program for a multicore system environment. The BMP scheme is a core locking technology. That is, the system initialization is executed in a core where the OS scheduler exists, application programs are distributed to the other cores, and a specific application program is executed on only a specific cores.
Now, advantages and disadvantages of the three schemes will be described. The SMP scheme is suitable for a large-capacity database service since the number of cores can be easily increased. However, the SMP scheme is not a best solution to an embedded terminal apparatus for specific-purpose computing, such as a mobile phone or a personal data assistant (PDA) since large resources may be consumed.
The AMP scheme is suitable for the embedded terminal apparatus such as a mobile phone or a PDA. That is, a master core is implemented with a high-price, high-performance core, and slave cores are implemented with low-price, low-performance cores, so that optimized functions can be configured. However, since OSs need to be provided to all the cores, the AMP scheme has a problem in terms of unified system status management and extensibility in comparison with the SMP scheme.
Conventional load balancing schemes using multicore manages a single master core for performing general functions and a plurality of specific-purpose dedicated cores, that is, fixed the single master core.
That is, similarly to a multi-processor using a single main CPU and a plurality of digital signal processors (DSPs), in the multicore CPU, the master core is provided to a main CPU, and the specific-purpose dedicated, fixed cores are used like the DSPs.
Now, the conventional load balancing system and method using multicore will be described in detail with reference to FIGS. 1 and 2.
Referring to FIGS. 1 and 2, in the conventional load balancing system and method using multicore, a master core 210 invokes a specific module device function 220, that is, a dedicated function in a kernel level of an inter-core OS and executes the specific module device function 220.
Functions 260 of module devices for performing specific functions among dedicated functions such as the specific module device function 220 are statistically embedded to slave cores 250 like firmware.
The master core 210 invokes functions of a module device (for performing specific functions needed by an application program 1 or an application program 2) from a slave core 250 through a system invoking interface and executes the functions (S310).
For example, in a case where a media player codec is embedded to the slave core in a firmware format, the application program of the master core use the media player codec invoked through the system invoking interface between the cores.
When execution of the specific function is completed in the application program, the system is ended (S320).
In the conventional balancing scheme, since the cores are used to be dedicated to only the specific functions, the functions that are not required by the application program may occupy the cores. Therefore, there is a problem in that utilization of core resources is lowered.
In addition, in the conventional balancing scheme, in a case where a slave core is not embedded with a module device function that is required by the application program of the master core, the module device function cannot be added and executed.
In addition, in the conventional load balancing scheme, since the application programs uses only one core without an OS scheduler, there is a problem of deterioration in parallelability and utilization.
That is, in a multicore system environment configured with the conventional load balancing scheme using multicore, in a case where a function other than the functions allocated to the cores is to be used, the parallelability, that is, the advantage of the multicore cannot be suitably utilized, so that performance of the entire system is deteriorated.
In the multicore system environment, the efficient utilization of the multicore is very important. However, for the aforementioned reasons, it is difficult to implement an asymmetric multicore structure capable of improving performance and reducing power consumption by simply allocating specific functions to the cores.